Building Scalable Embedded Systems with AMD MicroBlaze RISC-V for FPGAs and Adaptive SoCs
21 Oct 2025 - 21 Oct 2025
Germany, Leinfelden-Echterdingen
From concept to deployment - gain the tools and knowledge to build scalable embedded systems with AMD’s MicroBlaze RISC-V for FPGAs and SoCs.
This one-day technical seminar focuses on the new AMD MicroBlaze RISC-V for FPGAs and adaptive SoCs. Unlike the traditional MicroBlaze, it provides open-source based toolchains and extensibility. Flexible core configuration provides scalability to support a wide range of embedded applications.
Whether you’re refining existing designs or exploring new possibilities with RISC-V, this seminar is designed to support your development journey with clarity and confidence.
Date & location
- October 21st, 2025 - Avnet Silica, Humboldtstr. 35, D-70771 Leinfelden-Echterdingen, Germany
Agenda
| Time | Session | |
|---|---|---|
| 08:45 | Arrival and Welcome | |
| 09:00 |
Why MicroBlaze is now RISC-V
|
|
| 10:30 | Coffee Break | |
| 11:00 |
Setting up the MicroBlaze RISC-V Processing System
|
|
| 12:30 | Lunch and networking | |
| 13:30 |
Embedded Software Design using Unified Vitis
|
|
| 15:00 | Coffee Break | |
| 15:30 |
Application Design and Debugging
|
|
| 17:00 | Seminar Wrap-Up and Final Remarks | |
Seats are limited – register early to secure your spot!
Registration
Registration is closed.
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