AMD Tech Day Germany
16 Jun 2026 - 25 Jun 2026
Germany, multiple locations
Migrating to AMD Spartan™ UltraScale+™ and Running Zephyr on MicroBlaze™ V for AMD FPGA Families
This full-day technical seminar gives engineers a practical overview of modern AMD FPGA platforms, with a focus on Kintex™ UltraScale+™ Gen2 and Spartan™ UltraScale+™.
The sessions cover key architectural updates, especially around I/O, memory, and migration considerations.
In the afternoon, the focus shifts to embedded processing with RISC-V, MicroBlaze™ V, and Zephyr RTOS. The hands-on session on the SCU35 platform will demonstrate how to build, adapt, and run Zephyr-based applications on MicroBlaze™ V, including practical guidance from experienced embedded and hardware design expert.
Key topics include:
- Kintex™ UltraScale+™ Gen2 and Spartan™ UltraScale+™ overview, with focus on I/O and memory
- Key differences in Spartan™ UltraScale+™ and migration considerations for existing designs
- Introduction to RISC-V, MicroBlaze™ V and Zephyr RTOS
- Running Zephyr RTOS on MicroBlaze™ V
- Hands-on demo: Building and running custom Zephyr applications on SCU35 using MicroBlaze™ V, supported by Python scripts to simplify the design flow
Dates & locations
- 16 June 2026, Stuttgart, Germany
- 25 June 2026, Dortmund, Germany
Agenda
| Time | Session |
|---|---|
| 09:30 - 10:00 | Welcome, Registration & Open Technical Exchange Meet with our experts - An open, informal optional session to discuss your current designs, challenges, or questions with AMD and Avnet Silica experts before the formal agenda begins. |
| 10:00 - 10:15 | AMD Portfolio & Platform Update A concise update on AMD FPGA roadmap, platform direction, and key topics relevant to current and next generation designs. |
| 10:15 - 11:00 | Kintex™ UltraScale+™ Gen2 & Spartan™ UltraScale+™ Architecture Overview An overview of Kintex™ UltraScale+™ Gen2 devices and the Spartan™ Ultrascale+™ (SUP), with a focus on I/O capabilities, memory architecture, and updated device availability. |
| 11:00 - 11:15 | Coffee Break |
| 11:15 - 12:15 | Migrating to Spartan™ UltraScale+™: Key Differences and Design Considerations A deep dive into what changes when moving to SUP, including architectural differences, tool flow impacts, and practical points to consider when migrating existing designs. |
| 12:15 - 13:15 | Lunch |
| 13:15 - 14:15 | RISC V on AMD FPGAs: Introducing MicroBlaze™ V An introduction to MicroBlaze™ V, AMD’s RISC V–based soft processor, covering positioning, capabilities, and typical use cases compared to traditional MicroBlaze™ implementations. |
| 14:15 - 15:15 | Zephyr RTOS Fundamentals on MicroBlaze™ V An overview of the Zephyr real time operating system and what it enables on MicroBlaze™ V, including software architecture, ecosystem support, and integration considerations. |
| 15:15 - 15:30 | Coffee break |
| 15:30 - 16:30 | Live Demo: From Vivado™ to quickly deploy on the SCU35 Hands-on demo: Building and running custom Zephyr applications on SCU35 using MicroBlaze™ V, supported by Python scripts to simplify the design flow. |
| 16:30 - 17:00 | Technical Q&A Open Q&A to address platform specifics, migration challenges, tool flows, and software questions raised throughout the day. |
| 17:00 | Open Forum An open discussion session for deeper technical conversations, follow up questions, and peer to peer exchange. |
Partners
Registration
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