Renesas CRA Tech Days
23 Jun 2026 - 25 Jun 2026
UK, multiple locations
Designing secure microcontroller systems for CRA compliance
The electronics industry is undergoing a fundamental shift in how microcontroller based systems are designed. With the introduction of the Cyber Resilience Act (CRA), security can no longer be treated as an afterthought, it must be built in from day one.
To address this, Avnet Silica and Renesas are hosting a practical CRA & Secure MCU Design Tech Day, covering modern security first design approaches alongside the use of Zephyr RTOS to accelerate development through open source, third party software. This technical seminar combines theory and hands on learning, taking you from core concepts through to practical implementation using Renesas hardware.
What to expect:
- Understanding CRA requirements and their impact on MCU based designs
- Designing robust security into your products from the outset
- Using Zephyr RTOS to simplify development with open source components
- Hands on lab sessions using Renesas hardware (provided and yours to keep)
- Direct access to Avnet Silica and Renesas technical experts
You’ll have the opportunity to engage with specialist engineers throughout the day, with on site support during the sessions and follow up assistance after the event via Teams or on site visits, where required.
This event is ideal for engineers and technical decision makers looking to get up to speed quickly on secure MCU design in the context of CRA compliance.
Spaces are limited. Please register early to secure your place. Our team will review your registration and promptly send a confirmation email with the venue details.
Dates & locations
- 23 June 2026, Leeds, UK
- 25 June 2026, Maidenhead, UK
Agenda
| Time | Session |
|---|---|
| 09:00 | Arrival & registration |
| 09:30 | Welcome and overview of the day |
| 09:45 | Cyber Resilience Act (CRA): what it means for MCU design Key requirements, timelines and practical implications for engineering teams |
| 10:15 | CRA hands on lab Apply security by design principles using Renesas hardware |
| 12:15 | GreenPAK™: security through obfuscation Hardware based security through obfuscation using configurable mixed signal devices |
| 13:00 | Lunch & live demos Explore solutions and speak directly with Avnet Silica and Renesas technical experts |
| 13:45 | Introduction to Zephyr RTOS Open source RTOS concepts and how Zephyr simplifies and accelerates secure embedded development |
| 14:15 | Zephyr hands on lab Build and run applications using Zephyr on Renesas platforms |
| 16:00 | Close |
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