Multi-Tile Synchronization Characterization and Performance on the Zynq UltraScale+ RFSoC Gen 3 | Avnet Silica

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Multi-Tile Synchronization Characterization and Performance on the Zynq UltraScale+ RFSoC Gen 3

Multi-Tile Synchronization Characterization and Performance on the Zynq UltraScale+ RFSoC Gen 3

online, on-demand


Synchronizing data converters is critical for phased array and massive-MIMO applications, and effects like architecture, alignment, temperature, voltage and process can impact performance. In this webinar, we will review the Xilinx Zynq ® UltraScale+ ™ RFSoC data converter structure and recent multi-tile synchronization characterization and performance. A design methodology using HDL Coder ™ from MathWorks will be shown for custom implementations of multi-tile synchronization on the Xilinx ZCU208 evaluation kit.

Speakers

  • David Brubaker - Product Line Manager, Zynq Ultrascale+ RFSOC, Xilinx
  • Fred Kellerman - Wireless Communications FPGA Sysem Architect, Avnet

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Multi-Tile Synchronization Characterization and Performance on the Zynq UltraScale+ RFSoC Gen 3 | Avnet Silica

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