Xilinx Cost-Optimized FPGAs and Adaptive SoCs for Low Power Designs
on-demand
Innovate in Low Power Designs with Xilinx’s new Cost-Optimized Portfolio (COP) of SoCs and FPGAs
Miniaturization at the edge and endpoint is becoming pervasive across markets while the need for higher compute in the small form factor is rapidly increasing. This webinar introduces the Xilinx® UltraScale+™ Cost-Optimized Portfolio (COP) and discusses implementing machine vision and secure wireless communication applications with greater power efficiency. Through the course of the webinar, we also share the latest power delivery for both full rail consolidation & power managed solutions from our partner, Monolithic Power Systems (MPS).
Here’s some of what we’ll cover:
- UltraScale+ Cost-Optimized Portfolio overview and differentiating features
- Power management techniques for power conscious applications
- Key use cases and applications in embedded vision, networking, broadcast, and more
Attend this webinar to learn how to get started with docs, tools, and evaluation platforms for your next cost-sensitive, high bandwidth application at low power. We also have plenty of time for questions with technical experts from AMD and MPS.
Speakers
- Romisaa Samhoud, Product Line Manager, AMD
- Darragh Mulligan, Senior Technical Marketing Engineer, AMD
- George Stathakis, Product Line Manager, MPS
- John Heslip, Senior Staff Technical Marketing Power & Thermal, AMD
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