Renesas 8V79S680

The 8V79S680 is a fully integrated, clock and SYSREF signal fanout buffer for JESD204B applications. The main function of the device is the distribution and fanout of high-frequency clocks and low-frequency system reference signals generated by a JESB204B clock generator, extending its fanout capabilities and providing additional phase-delay. It can deliver very low phase noise clocks and precise, phase-adjustable SYSREF synchronization signals as required in GSM, WCDMA, LTE, LTE-A radio board implementations. 

Key features

• High clock/SYSREF signal fanout
  • Additional fanout for 8V19N490
  • High clock frequency <3 GHz
• Low additive phase noise and low noise floor
  • Phase noise <100fs RMS, noise floor <-160dBc/Hz
• Synchronized 16 outputs with deterministic I/O latency
• Phase stability over temperature

Applications

• Communications