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STMicroelectronics STM32G564PB→STM32G564PBI3

 

Mixed-signal Arm Cortex-M33 MCU, 280 MHz, 128 KB flash, 112 KB RAM, crypto, rich analog, 3x MC timers, Hi-resolution timer

STMicroelectronics STM32G564PB→STM32G564PBI3 product image

The STM32G56xxx devices are high-performance microcontrollers of the STM32G5 series, based on the high‑performance Arm® Cortex®-M33 32-bit RISC core. They operate at a frequency of up to 280 MHz.

The Cortex®-M33 core features a single-precision floating-point unit (FPU), which supports all the Arm® single‑precision data-processing instructions and all the data types.

The Cortex®-M33 core implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) that enhances the application security.

The devices embed high-speed memories (up to 512 Kbytes of dual bank flash memory and 112 Kbytes of SRAM), one XSPI memory interface (at least one XSPI available on all packages), and an extensive range of enhanced I/Os and peripherals connected to three APB buses, four AHB buses, and a 32-bit multi-AHB bus matrix.

The devices offer security foundation compliant with the trusted-based security architecture (TBSA) requirements from Arm®. It embeds the necessary security features to implement a secure boot, secure data storage and secure firmware update. Besides these capabilities, the devices incorporate a secure firmware installation that allows the customer to secure the provisioning of the code during its production.

 

Key features

  • Security and cryptography
    • Arm® TrustZone® with Armv8-M mainline security extension
    • Arm® TrustZone® and securable peripherals
    • Flexible life cycle scheme with secure debug authentication
    • Pre-configured immutable root of trust (STiRoT)
    • SFI (secure firmware installation)
    • Secure data storage with hardware unique key (HUK)
    • Secure firmware upgrade support
    • Live firmware upgrade
    • Secure hide protection HDP (temporal isolation function)
    • Two AES coprocessors including one with DPA resistance
    • Public key accelerator, DPA resistant
    • On-the-fly decryption of XSPI external memories (OTFDEC)
    • HASH hardware accelerator
    • True random number generator, NIST SP800-90B compliant
    • CRC calculation unit, 96-bit unique ID
    • Active tampers
  • Packages
    • ECOPACK2 compliant packages (all)
    • Exposed pad option available for industrial applications (selected packages)
    • Ambient temperature range: from -40°C up to 125°C (Tj = 140°C)
  • Debug
    • Authenticated debug and flexible device life cycle
    • Serial wire-debug (SWD), JTAG, Embedded Trace Macrocell™ (ETM)
  • Low-power modes
    • Sleep, Stop, and Standby modes
    • 32 backup registers (32-bit)
    • Calendar RTC with alarm, periodic wake-up from Stop/Standby
  • General-purpose inputs/outputs
    • Up to 103 fast I/Os with interrupt capability (most 5 V tolerant)
  • Clock management
    • Internal oscillators: HSI (64 MHz), HSI48 (48 MHz), LSI (32 kHz)
    • External oscillators: HSE ( 4-50 MHz), LSE (32.768 kHz)
  • Reset and supply management
    • 2.7 V to 3.6 V supply voltage
    • POR, PDR, PVD, and AVD
    • Embedded regulator (LDO) or SMPS step-down converter regulator with configurable scalable output to supply the digital circuitry
  • 2 × DMA controllers to offload the CPU
    • Dual-port DMAs with FIFO
  • Communication interfaces
    • Up to four I2Cs, supporting Fm+ SMBUS 3.3(R)/PMBus®(R)
    • One I3C
    • Up to six U(S)ARTs (supporting ISO7816, LIN, IrDA, modem control modes, and up to three of them supporting SPI operating mode)
    • One LPUART
    • Up to three SPIs, two of which are capable to support audio-class-accuracy full-duplex I2S interface (using an internal audio PLL or external clock).Additional SPI interfaces can be supported if USART is configured in Synchronous mode (one additional SPI with XSPI).
    • Three FDCANs
    • One USB Type-C® / USB Power Delivery r3.1
    • Two position encoder interfaces POSENC (with Hiperface DSL, EnDAT 3 support)
  • Includes ST state-of-the-art patented technology.
  • Up to 26 timers
    • HRTIM (Hi-Resolution timer): 6 x 16-bit counters, 12 PWM outputs (12 outputs with 111 ps resolution). Only applicable for STM32G564xx devices.
    • 17 x 16-bit (including one low-power timer available in Stop mode and three motor control timers)
    • 4 x 32-bit timers with up to four IC/OC/PWM or pulse counters and quadrature (incremental) encoder input
    • Two watchdogs
    • Two SysTick timers
  • Programmable logic array (PLAY)
    • PLAY interface with 128 inputs and 16 outputs, 16 programmable logic elements (refer to PLAY specification in RM0514)
  • Analog
    • Three 12-bit ADCs with up to 5 Msps with 12-bit resolution (up to 39 channels) with hardware oversampling
    • Eight 12-bit DAC channels
  • Two buffered external channels, 1 MSPS
  • Six unbuffered internal channels, 15 MSPS
    • Eight ultrafast rail-to-rail analog comparators, 20 ns propagation delay
    • Three operational amplifiers that can be used in PGA mode, all terminals accessible
    • Internal voltage reference buffer (VREFBUF) supporting four output voltages (1.8 V, 2.048 V, 2.5 V, 2.9 V)
    • Digital temperature sensor
  • Mathematical acceleration
    • CORDIC for trigonometric functions acceleration
    • Two FMAC (filter mathematical accelerator)
  • Memories
    • Up to 512 Kbytes of embedded flash memory with ECC, 2 read‑while‑write banks
    • Up to 48 Kbytes of flash memory per bank with high-cycling capability (100 Kcycles) for data flash
    • 1 Kbyte OTP (one-time programmable)
    • 112 Kbytes of SRAM with ECC (32-Kbyte SRAM1 (routine booster), 64-Kbyte SRAM2, 16‑Kbyte SRAM3)
    • One XSPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, hyper RAM / flash memory frame formats
  • Accelerators
    • ART 8-Kbyte instruction cache allowing 0-wait-state execution from flash and external memories
    • ART 4-Kbyte data cache for external memories
    • Routine booster: SRAM1 (32-Kbyte) on instruction bus (CCM-SRAM)
  • Core
    • Arm® Cortex®-M33 CPU with TrustZone®, FPU, frequency up to 280 MHz, MPU, 1136 CoreMark® (4.059 CoreMark®/MHz)

 

Applications

  • Motor control
  • Digital power
  • Industrial equipment
  • Instrumentation & measurement
  • Home appliances

 

Available tools

NUCLEO-G564RE:

STM32 Nucleo-64 development board with STM32G564RE MCU, supports Arduino and ST morpho connectivity

The STM32 Nucleo-64 board provides an affordable and flexible way for users to try out new concepts and build prototypes by choosing from the various combinations of performance and power consumption features provided by the STM32 microcontroller.

Data brief

 

B-G564E-MC1S:

Discovery kit with STM32G564xx MCU

The B‑G564E‑MC1S Discovery kit is part of the motor control development platform supporting ZeST and HSO algorithms. The B‑G564E‑MC1S is a control board with the STM32G564QET3 microcontroller in the ZeST Discovery pack and works together with a power board such as STEVAL-LVLP01, an optional adaptor board such as B-ZEST-ADAPT1, and an accessory package such as B-MOTOR-PMSMA1.

Data brief

 

B-G564E-DPOW1:

Coming soon

 

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