Focus product

Macronix OctaBus Memory

Macronix OctaBus Memory - Built on Serial Peripheral Interface (SPI) and command protocol, providing extendable I/O capability

Macronix octaBus - front and back side

Being popular in the Automotive industry, the industrial segment is now starting to deploy systems supporting Octal SPI interfaces. Macronix OctaBus Memory is a portfolio of extreme speed memory products built on Serial Peripheral Interface (SPI) and command protocol, providing extendable I/O capability. Expanding from current Quad I/O to OctaFlash (8 I/O) will efficiently broaden our Serial NOR Flash throughput. Macronix OctaBus Memory (8 I/O) also retains the user interface compatible with the ordinary single I/O Serial NOR Flash, which can sustain users’ experience in using Serial NOR Flash with minimum efforts.

This breakthrough product incorporates flash memory and RAM memory into the same data I/O bus, reducing the pin count to 12. An OctaBus ™ based memory design allows for OctaFlash, OctaRAM ™, and OctaMCP™ products which are high performance, low pin count solutions.

The LW/UW series is a multiple bank architecture solution based on ultra-high performance OctaBus interface, which provide simultaneous Read-While-Write capability that allows read access from one memory bank while writing to another memory bank.

The LM/UM series is a multiple bank architecture solution based on the ultra-high performance Macronix OctaBus™ interface, which dedicates to raising the product performance with the fastest 250MHz frequency, combining with the brand-new Data Transfer Rate (DTR) feature. The data transfer rate has therefore been increased from existing 100MB/s of Quad I/O Serial NOR Flash to 500MB/s, while the read latency has also been lowered immensely. The improved performance will help system in running eXecute In Place (XIP) on OctaFlash with more efficiency and shorten the access time in high density, which accelerates overall system performance.

The LW/UW series provide simultaneous Read-While-Write capability that allows read access from one memory bank while writing to another memory bank.

It is an ideal solution for Over-The-Air (OTA) update applications which are becoming more prevalent within Automotive Cockpit solutions.

 

Key features

  • Support 3V/1.8V operation voltage
  • Backward compatible with x1 I/O SPI interface
  • Both STR & DTR (Double Transfer Rate) mode support
  • New DTR feature for Read, Program and Erase operation

 

LM/UM series

  • Upto 250MHz clock frequency with both DTR/STR operation

 

LW/UW series

  • Multiple bank architecture
  • Support Simultaneous Read while Write operations

 

Macronix OctaBus Portfolio - selected for market leaders´ solutions

 

 

 

Related Links



Have a question? Contact us

Email:
For general questions:
yourmessage@avnet.eu

Local Avnet Silica offices:
Click here to find contact information for your local Avnet Silica team.