AMD Embedded Tour 2026
24 Jun 2026 - 24 Jun 2026
Madrid, Spain
Join Avnet Silica for the AMD Embedded Tour – Madrid
The AMD Embedded Tour is back for 2026 and returns once again to Madrid, bringing a full day of practical, engineering focused insight to one of our most established locations. Built around real design challenges, this one day event helps engineering teams manage system complexity and make confident technology decisions for their next generation of products.
This year’s programme brings a broad, technically rich agenda shaped around the needs of embedded engineers in the region. Topics span adaptive SoC design, system level optimisation, and performance tuning across AMD Versal™ and Spartan UltraScale+™ devices. The day also covers essential areas including cybersecurity on FPGA/SoC platforms, frequency planning for RFSoC/Versal RF, building efficient video processing pipelines, and designing high performance DSP systems using AI Engines and programmable logic.
Attendees will also benefit from updates across the wider AMD technology stack, including Embedded Linux development with Yocto Project® based frameworks, the current AMD AI/ML landscape with Vitis™ AI (featuring a live demo), COP and MicroBlaze™ V with Zephyr, and x86 based innovation across industrial, robotics and health applications. In addition, the agenda includes the latest Aerospace and High Reliability updates across FPGA and x86 platforms.
Whether you’ve attended previous editions in Madrid or are joining us for the first time, the AMD Embedded Tour 2026 is designed to help you accelerate problem solving, reduce design risk, and build systems ready for the future.
Date & Location
24 June 2026 - TBC
Agenda
| Time | Session | |
|---|---|---|
| 08:30 | Registration | |
| 09:00 - 09:15 | Welcome and Opening Remarks Setting the scene for the day, outlining key themes and what attendees can expect from the programme. |
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| 09:15 - 10:00 | AMD Adaptive SoC portfolio and applications, including x86 embedded A detailed overview of the latest AMD Adaptive SoC families, highlighting new capabilities and real world applications, including innovations powered by x86 embedded technology. |
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| 10:00 - 10:50 | Cyber security aspects on FPGA/SoCs + Demo An exploration of key cybersecurity considerations for FPGA and SoC platforms, highlighting threats, mitigation strategies, and best practices for securing programmable architectures. It includes a live demonstration showcasing practical security features and real world attack prevention techniques, providing designers with actionable insights to strengthen system resilience. |
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| 11:00 - 11:30 | Coffee break and marketplace | |
| Track 1 | Track 2 | |
| 11:30 - 12:20 | Frequency Plan and Frequency Planner + RFSoC/Versal RF An overview of frequency planning methodologies and the capabilities of modern frequency planners, with a focus on recent updates to AMD’s RFSoC and Versal RF platforms. It highlights advances in wideband signal generation, clocking strategies, and integrated RF performance, offering practical guidance for optimising system level frequency architectures in next generation radio and communication designs. |
Streamlining Embedded Linux® Development with Yocto Project® Based Frameworks An introduction to Yocto Project® based embedded development frameworks for building and deploying code on hard processing subsystems in adaptive devices. Learn the development flows used to build and deploy Linux® and embedded applications on development kits, enabling a more streamlined embedded software workflow. |
| 12:25 - 13:15 | Optimising System Bandwidth with the AMD Versal™ Programmable NoC and NoC Compiler Discover how Network on Chip (NoC) architectures, combined with compiler driven optimisation, can significantly improve system performance. Learn how automated optimisation reduces system resources, improves bandwidth, and enhances scalability in complex adaptive SoC designs. |
x86 / IRH + High-Reliability Solutions (FPGA + x86) An overview of the AMD Industrial, Robotic and Health (IRH) solutions, along with the latest updates for aerospace and high-reliability applications using FPGA and x86 technologies. It highlights key platform capabilities, reliability features, and emerging use cases across, offering insights into how the AMD portfolio supports next generation industrial and high-reliability system designs. |
| 13:20 - 14:05 | Designing High-Performance DSP Systems Using AI Engines and Programmable Logic | COP, MicroBlaze V, Zephyr The AMD Cost Optimised Portfolio (Spartan, Artix, Zynq) integrates with the MicroBlaze V RISC V soft processor and Zephyr RTOS to deliver highly configurable, scalable, open source embedded solutions. Ideal for cost sensitive applications such as environmental monitoring and data acquisition, the portfolio leverages Zephyr and Linux OS support to accelerate innovation and reduce time to market. |
| 14:10 - 15:10 | Lunch and networking | |
| 15:15 - 16:05 | Optimising AMD Versal™ and Spartan UltraScale+™ Designs with Vivado™ Design Suite Explore the latest AMD Vivado™ Design Suite features that help with QoR, ease of use, and fast development. Additionally, we describe the new Advanced Flow for AMD Versal™ devices and some optimisations made for increased design performance with AMD Spartan™ UltraScale+™ FPGAs. |
Building Efficient Video Processing Pipeline on Adaptive SoC |
| 16:10 - 17:00 | High-Reliability Solutions Update An update on the AMD high-reliability solutions, focusing on the latest advancements in ruggedised FPGA and processor technologies. It highlights enhanced security features, long term reliability, and performance capabilities across modern applications. Attendees will gain insights into how the AMD portfolio supports next generation radar and secure embedded systems. |
Introduction to current AMD AI/ML Landscape including new Vitis AI + demo Deep dive into the current AMD AI/ML landscape, highlighting the latest advancements across hardware, software, and development tools, including an overview of the new Vitis AI features that streamline model deployment and optimisation on AMD platforms. A live demo will showcase practical workflows and real-world performance, helping developers accelerate AI innovation on AMD technologies. |
| 17:00 - 17:45 | Raffle and closing remarks Key takeaways from the day, final remarks, and the closing raffle. |
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Registration