Why you should care about SiC figures of merit | Avnet Silica

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Why you should care about SiC figures of merit | Avnet Silica

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Why you should care about SiC figures of merit

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Power electronics covers a vast range of applications from milli- to megawatts. Three areas that get particular attention today are EV chargers and their powertrains, solar power and energy storage at the grid level.

Of course, the underlying theme in all these areas is energy savings to reduce costs and environmental impact. As part of this, efficiency of power conversion stages is a focus as are the semiconductors used.

In EVs, the aim is to get the quickest charge times and longest range from a given battery top-up. In solar, losses have to be minimized to make the installation financially viable, with quick capital payback. Energy storage systems make energy distribution more reliable and versatile, providing peak power demands and acting as a repository for excess energy in vehicle batteries or other renewable sources such as solar and wind.

 

SiC semiconductors are enablers for growth in energy markets

In all these cases, there are elements of AC-DC, DC-DC and DC-AC power conversion, as well as power factor correction, all achieved with switching power supply stages. The semiconductors used have historically been IGBTs at high power and perhaps silicon MOSFETs at lower power levels. However, new wide bandgap semiconductors are increasingly used, particularly silicon carbide (SiC) MOSFETs and diodes, for their lower losses when switched at high frequency, which itself confers major savings in size, weight and cost.

SiC semiconductors are now an enabler for the growth in the areas mentioned: 13% CAGR for solar string inverters, 26% CAGR for vehicle chargers and 17% CAGR for decentralized energy storage systems. In fact, some switching topologies are practical only with wide bandgap devices such as the now-popular Totem-Pole PFC stage at high power.

The major semiconductor manufacturers have all entered the wide bandgap device market and promote their products as having a competitive advantage in some way. This can make the product designer’s choice difficult. But established figures of merit (FOMs) can be used to compare devices. First, it’s useful to state the benefits of SiC over silicon technologies.

SiC material properties summarized


Silicon carbide technology benefits better thermal conductivity. (Source: onsemi)

The resulting benefits in an end application are lower conduction losses and lower switching losses so that switching frequency can be pushed up into tens or hundreds of kHz in typical applications where IGBTs might have been limited to less than 20 kHz. Higher frequency makes associated passive components smaller, particularly inductors in energy storage and filtering functions.

Alternatively, switching frequency can be kept low and dynamic losses then become so small that little heatsinking is required, reducing hardware, energy cost and weight. SiC also enables higher dissipation from a given die size because of its better thermal conductivity and potentially higher operating die temperature, although practically this is limited by the packaging material.

 

Comparing apples with apples using FOMs

The comparative benefits of SiC must be evaluated under specified conditions to be valid and this is where FOMs come in for a particular class of device.

It’s not useful, for example, to compare on-resistance of a SiC MOSFET rated at 60 V with one at 650 V, and even at a given voltage rating, there are other factors. For example, onsemi’s 650 V-rated SiC MOSFETs have the lowest on-resistance in the market with a gate-source voltage 18 V. Competitive parts achieve the same resistance, but only if VGS is limited to 15 V. The FOM RDS.A is also useful, the product of on-resistance and die area for a particular voltage class of device. This encapsulates the practical trade-off of conduction loss and die size, which in turn affects device capacitance, switching energy, and number of die per wafer. This also hints at the expected cost, with more die per wafer giving economy of scale. Smaller die do however have relatively higher thermal resistance to the case.

FOMs can also be relevant only in some circumstances. For example, RDS.QG relates conduction loss to gate charge which produces frequency-related dynamic losses in the gate drive circuit, but these only become significant at very high switching rates because QG for a SiC MOSFET is anyway very low. Loss does increase however with total gate voltage swing, so if the gate is driven from its maximum positive to a negative voltage for the OFF-state, losses are relatively higher. Another application-related FOM is RDS.EOSS. This combines conduction loss and dynamic losses in soft-switching topologies, whereas RDS.QRR is more relevant to hard switching circuits, where the energy recovery QRR of the device body diode must be small for low dynamic loss. For SiC diodes, a useful FOM is VF.QC, a low figure signifying a combination of low forward voltage drop and reverse charge for minimum overall losses.

Other parameters that might be compared between Si and SiC and between SiC devices are gate threshold voltage and its stability, turn-on and turn-off energy, on-resistance variation with temperature, the margin between operating and maximum gate voltage, short circuit withstand time, avalanche energy and body diode forward voltage drop and its recovery time and recovery charge.

 

Soft FOMs are important too

FOMs mentioned can be seen in device datasheets and verified by lab measurements, but there are other soft factors as well that are more difficult to quantify but are just as important.

Quality is the obvious one, not just in terms of product reliability and consistency but also in availability and support. This is best facilitated by the semiconductor manufacturer having tight end-to-end control of its supply chain and manufacturing process. In this context, onsemi decided to vertically integrate to the extent that SiC wafer manufacturing and epitaxy is fully in-house at the 150 mm/200 mm level. Fabrication technology today is planar for SiC, but trench is lined up for the future. All common package styles are supported from provision of bare die to discretes in leaded and lead-less styles to modules of hybrid IGBT/SiC and full SiC for high power applications.

Quality control


These types of wafer defects are screened out in SiC.

A new introduction in May 2022 for onsemi is the world’s first TO-leadless package (TOLL) for a SiC MOSFET. The first device in the range is 650 V rated with an on-resistance of 33 mohms. With a footprint of just 9.9 x 11.68 mm, it offers 30% savings in PCB area compared with a D2PAK package. At 2.3 mm high, it also occupies 60% less volume. The TOLL package is an example of leveraging the features of low lead inductance, around 2 nH, and a Kelvin source connection to make the most of the high edge-rate capabilities of SiC MOSFETs for high efficiency and power density while controlling EMI and enabling easy PCB design.

Like all new technologies, SiC had its teething problems, particularly with wafer defects, but a world-class approach to quality control has been implemented at onsemi to reduce the effects to negligible levels. Defects that have been seen are threading screw dislocation (TSD), threading edge dislocation (TED), and basal plane dislocation (BPD).

Product reliability screening at onsemi includes testing at 100% rated voltage and 175°C, intrinsic gate oxide reliability testing, cosmic radiation immunity and validation of the stability of the gate threshold and associated parameters. This is to address concerns early in the development of SiC technology about the drift of gate characteristics with gate bias stress and age. Tests on body diode forward voltage are also performed to check for degradation. If SiC MOSFETs have any disadvantage against Si-MOSFETs, it is the forward voltage drop of the body diode, which can be several times higher, despite being much faster under recovery conditions. Confidence in the actual value of VF and its consistency is therefore important.

Avalanche testing

avalanche testing graph
Avalanche characteristics shown of an onsemi SiC MOSFET M3S 1200V 22mohm. (Source: onsemi)

In production, wafers are scanned for defects before and after epitaxial growth and 100% avalanche testing of die is also performed. This is an important consideration in typical inductive load applications such as motor drives and is a differentiator between SiC and the other wide bandgap contender, GaN, which does not have an avalanche rating. In the example SiC MOSFET below, the avalanche energy is 267 mJ, based on 25°C starting, L=1 mH, IAS = 23.1 A, VDD=100 V and VGS = 18 V. This compares with a similarly rated Si-MOSFET value of 264 mJ under the same conditions (onsemi NTHL020N120SC1).

Burn-in is also performed at elevated ambient temperature and at maximum gate voltage to remove any extrinsic gate oxide failures. At onsemi, in-process controls meeting automotive standards also give an additional guarantee of performance and consistency.

In total, the SiC offering from onsemi includes diodes at 650 V, 1200 V and 1700 V rating, from 4 to 50 A, MOSFETs at 650 V, 900 V and 1200 V, rated from 17.3 A to 163 A, modules at 900 V and 1200 V, in two-pack, four-pack, six-pack variants, and parts with MOSFETs configured for Vienna rectifiers. Half-bridge and full-bridge versions are also available, along with modules with integral SiC MOSFETs and diodes for two- and three-channel boost stages. In support of their products, engineers at onsemi have deep know-how in industrial and automotive applications, from locations across the globe providing secure end-to-end SiC solutions.

Access your full informational toolkit with more than 20 SiC design assets!

 

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