Nexperia GPIO Expander NC6416
NC6416 - Low-voltage translating 16-bit I²C-bus/SMBus I/O expander
The NCA6416-Q100 is a versatile 16-bit general-purpose I/O expander designed for microcontrollers that need additional I/O pins. It communicates via an I²C-bus interface, making it ideal for applications with minimal space and wiring, such as battery-powered devices using sensors, keypads, push buttons or LED control for managing LED brightness.
Nexperia's I/O expanders feature a dual power supply architecture with two inputs: VCCI and VCCP. This design enables seamless level translation, supporting mixed-voltage environments. VCCI powers the I²C interface and must be connected to the same voltage as the host microcontroller's I²C bus (SDA/SCL), which can range from 1.65 V to 5.5 V. VCCP powers the internal core and the I/O pins on Port P, defining the voltage level for the connected peripherals. This allows a low-voltage microcontroller to interface with higher-voltage peripherals without additional external circuitry.
The NCA6416-Q100 contains four pairs of 8-bit registers: Configuration, Input, Output, and Polarity Inversion. By default, all I/O pins are configured as inputs at power-on. A system controller can dynamically reconfigure these pins as inputs or outputs by writing to the Configuration register. The Input and Output registers store the current state of each pin. The Polarity Inversion register allows to invert the polarity of the input pins, which can simplify logic in system by eliminating the need for external gates.
The device has an open-drain INT output that triggers when an input pin changes state. This interrupt can be connected to a microcontroller's interrupt pin, allowing the NCA6416-Q100 to notify the host of a change without the need for constant polling over the I²C bus. This feature makes the NCA6416-Q100 an efficient and passive I²C target device.
To recover from errors like I²C time-outs, a system controller can drive the RESET input low. This resets all registers to their default state and reinitializes the I²C/SMBus interface without requiring a power cycle.
A hardware ADDR pin allows to program the device's I²C address, making it possible to use up to two NCA6416-Q100 devices on a single bus. In addition, each output pin on Port P can sink up to 25 mA, making it suitable for directly driving low-current loads like LEDs.
Key features
- I²C-to-parallel port expander with wide supply range (1.65 V–5.5 V)
- Bidirectional level translation between mixed voltages (1.8 V, 2.5 V, 3.3 V, 5 V)
- Ultra-low standby current: 1.5 μA @ 5 V, 1.0 μA @ 3.3 V
- Schmitt-trigger inputs for noise immunity (Vhys: 0.18–0.5 V depending on VCC)
- 5 V tolerant I/O, active-LOW RESET, and open-drain INT
- Fast-mode I²C up to 400 kHz
- Configurable registers: Input/Output and Polarity Inversion
- Glitch-free power-up, no sequence required, supports partial power-down
- Noise filter on SCL/SDA, internal power-on reset
- Latched outputs with up to 25 mA drive for LEDs
- Robust protection:
- Latch-up > 100 mA (JESD78 Class II)
- ESD: HBM > 2 kV, CDM > 1 kV
- Package options: TSSOP24, HWQFN24
- Temperature range: −40 °C to +85 °C and −40 °C to +125 °C
Applications
- Servers, Routers
- Factory Automation
- Products with target address conflicts
- Automotive: ADAS, BCM
Product portfolio
| Type number | VCC (V) | VCC(B) (V) | Logic switching levels | Power dissipation considerations | Tamb (°C) | Number of pins | Package name | Datasheet |
|---|---|---|---|---|---|---|---|---|
| NCA6416BY | 1.65 - 5.5 | 1.65 - 5.5 | CMOS | low | -40~85 | 24 | HWQFN24 | Download datasheet |
| NCA6416BY-Q100 | 1.65 - 5.5 | 1.65 - 5.5 | CMOS | low | -40~125 | 24 | HWQFN24 | Download datasheet |
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