STMicroelectronics STGAP3S6S
STGAP3S6S - Galvanically isolated gate driver for SiC MOSFETs with 6 A Source/Sink current, desaturation protection and adjustable SOFTOFF
The STGAP3S is a family of protected single gate drivers that provides galvanic isolation between the gate driving channel and the low voltage control and interface circuitry.
The platform includes different options with 10 A and 6 A current capability, each of which is available with dedicated UVLO variants for SiC MOSFETs and IGBTs.
Ultrafast desaturation protection is also available with differentiated intervention thresholds and adjustable soft turn-off.
The availability of the Miller CLAMP and optional negative driving enables optimal driving performance.
Features
- High voltage rail up to 1200 V
- Driver current capability: 6/10 A sink/source @25 °C
- ±200 V/ns Common Mode Transient Immunity (CMTI)
- 75 ns input-output propagation delay
- Miller CLAMP driver for external N-channel MOSFET 0.3 A source/0.5 A sink
- Adjustable soft turn-off function
- VDD UVLO
- VH UVLO: IGBT and SiC variants
- Desaturation protection: IGBT and SiC variants
- Gate driving voltage up to 32 V
- Negative gate driving voltage up to -10 V
- 3.3 V, 5 V TTL/CMOS inputs with hysteresis
- Temperature shutdown protection
- Reinforced galvanic isolation:
- Isolation voltage VISO = 5.7 kVRMS (UL 1577)
- Transient Overvoltage VIOTM = 8 kVPEAK (IEC 60747-17)
- Max. Repetitive Isolation Voltage VIORM = 1.2 kVPEAK (IEC 60747-17)
- Wide body SO-16W package
Applications
- Motor driver for home appliances, factory automation, industrial drives, and fans
- 600/1200 V inverters
- Battery chargers
- Induction heating
- Welding
- UPS
- Power supply units
- DC-DC converters
- Power factor correction
EVLSTGAP3S6S - Half-bridge evaluation board for STGAP3S6S SiC MOSFETs isolated gate driver with protections
The EVLSTGAP3S6S is a half-bridge evaluation board designed to evaluate the STGAP3S6S isolated single gate driver.
The STGAP3S6S is characterized by 6 A current capability, rail-to-rail outputs and optimized UVLO and DESAT protection thresholds for SiC MOSFETS, which makes the device optimal for high-power motor drivers in industrial applications.
The gate driver has a single output pin and a driver line for an external Miller CLAMP N-channel MOSFET, which optimizes positive and negative gate spikes suppression during fast commutations in half-bridge topologies.
The board is supplied by the 5 V VAUX connection, which fed the isolated DC-DC converters for the low-side and high-side driving sections. The gate drivers can be directly supplied by VAUX if a 5 V MCU is used, or by the onboard linear regulator if a 3.3 V MCU is used. The PWM and Reset inputs can be easily controlled through dedicated connectors while diagnostic outputs are connected to an onboard LED.
Device protection features (Desaturation, Soft turn-off and Miller clamp) are connected to the recommended network on the board and can be easily evaluated through the board test points.
Dual input pins allow the selection of signal polarity control and implementation of HW interlocking protection to avoid cross-conduction in case of controller malfunction.
The device allows implementing negative gate driving, and the on-board isolated DC-DC converters allow working with optimized driving voltage for SiC MOSFETs.
The EVLSTGAP3S6S board allows evaluating all of the STGAP3S6S features while operating with a bus voltage up to 520 V. It is possible to increase the bus voltage up to 1200 V by replacing the two SiC MOSFETs with appropriate devices in a H2PAK-7 package and the C4 capacitance if needed.
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