Microchip MCP6C02

Microchip offers MCP6C02 high-side current sense amplifier with preset gains of 20, 50 and 100 V/V. The common-mode input range (V_IP) is 3V to 65V. The differential-mode input range (VDM = VIP − V_IM) supports unidirectional and bidirectional applications. You can set the power supply between 2.0V and 5.5V. You can specify the parts in the SOT-23 package over −40°C to +125°C (E-temp) and parts in the 3 × 3 VDFN package over −40°C to +150°C (H-temp). The Zero-Drift architecture supports very low input errors that allow a design to use shunt resistors of lower value (and lower power dissipation).

Features

• Single amplifier: MCP6C02
• Bidirectional or unidirectional
• Input (common-mode) voltages:
• 3.0V to 65V, specified
• 2.8V to 68V, operating
• −0.3V to +70V, survival
• Power supply:
• 2.0V to 5.5V
• Single or dual (split) supplies
• High DC precision:
• VOS is ±1.65 μV (typical)
• CMRR is 154 dB (typical)
• PSRR is 138 dB (typical)
• Gain error of ±0.1% (typical)
• Preset gains are 20, 50 and 100 V/V
• POR protection:
• High-voltage POR for V_IP – VSS
• Low-voltage POR for V_DD – V_SS
• Bandwidth: 500 kHz (typical)
• Supply currents:
• I_DD is 490 μA (typical)
• I_BP is 170 μA (typical)
• Enhanced EMI protection:
• EMIRR is 118 dB at 2.4 GHz (typical)
• Specified temperature ranges:
• −40°C to +125°C (E-temp part)
• −40°C to +150°C (H-temp part)

Applications

• Automotive
  • AEC-Q100 qualified, Grade 0 (VDFN package)
  • AEC-Q100 qualified, Grade 1 (SOT-23 package)
• Industrial computing
• Motor control
• Analog level shifter
• Battery tester/monitor

MCP6C02/4 Evaluation Board

The evaluation board demonstrates the performance of Microchip’s MCP6C02/4 high-side current sense amplifier. A load is supplied on the board for a convenient demonstration of the evaluation board. Supplying power and a load to the evaluation board will produce a small, measurable voltage drop across a shunt resistor on the evaluation board. This voltage drop is then amplified by the MCP6C02/4 on the board and outputted differentially at the test points: V_OUT+ and V_OUT(TP1 and TP2).