MCX MCUs: Pushing the edge of what’s possible

MCX N94x/N54x block diagram

MCX N94x/N54x | Specifications

Core platform

• Arm^® Cortex^®-M33 @ 150 MHz (Dual core)
• DSP Accelerator (PowerQUAD, with Co-Processor interface)
• SmartDMA
• eIQ^® Neutron N1-16 Neural Processing Unit (NPU)
• Coolflux BSP32 (Programmed as PLC)
   

Memory

• Up to 2 MB (2 x 1MB Bank) on chip Flash
• Supporting Flash Swap and Read While Write
• Cache Engine with 16 KB RAM
• Up to 512 KB RAM, configurable as up to 416 KB with ECC (support single bit correction two bits detection)  
• Up to 4x 8 KB ECC RAM can be retained down to VBAT mode
• FlexSPI with 16 KB cache supporting XIP, Octal/Quad SPI flash, HyperFlash, HyperRAM, Xccela memory types
   

Peripherals

• Analog
  • 4x 16bit ADC (Single Ended) or 2x16bit (Differential)
    • Up to 2 Msps in 16bit mode and 3.3 Msps in 12bit mode
  • Integrated temperature sensor connected per ADC
  • Three high-speed comparators with 17 input pins and 8-bit DAC as internal reference
    • 2x CMP is functional down to Deep Power Down mode
  • Two 12-bit DAC with sample rates of up to 1.0 MSample/sec
  • One 14-bit DAC with sample rates of up to 10 MSample/sec
  • Three OpAmps can be configured to:
    • Programmable Gain Amplifier
    • Differential Amplifier
    • Instrument Amplifier
    • Transconductance Amplifier
       
  • Highly accurate VREF ±0.15 % and 15 ppm/deg C drift
     
• Timers
  • Five 32-bit standard general-purpose asynchronous timers/counters, which support up to four capture inputs and four compare outputs, PWM mode, and external count input. Specific timer events can be selected to generate DMA requests.
  • SCTimer/PWM
  • LPTimer
  • Frequency measurement timer
  • Multi-Rate Timer
  • Windowed Watchdog Timer
  • RTC with calendar
  • Micro Timer
  • OS Event Timer
     
• Communication interfaces
  • USB high-speed (Host/Device) with on-chip HS PHY
  • USB full-speed (Host/Device) with on-chip FS PHY, USB Device
  • uSDHC (Micro SD High Speed Card Interface)
  • 10x LP Flexcomms each supporting SPI, I2C, UART
  • 2x FlexCAN with FD, 2x I3Cs, 2x SAI
  • 1x Ethernet with QoS
  • 1x FlexIO programmable as a variety of serial and parallel interfaces, including, but not limited to Display Driver and camera interface
  • 2x EVM Smart Card Interfaces
  • Programmable Logic Unit (PLU)
     
• Motor control subsystem
  • 2x eFlexPWM each with 4 sub-modules, providing 12 PWM outputs
  • 2x Quadrature Encoder/Decoder (ENC)
  • 1x Event Generator (AND/OR/INVERT) module support up to 8 output trigger
  • SINC Filter Module (3rd order, 5ch, Break signals connections to PWM)

Security

• EdgeLock^® Secure Enclave, Core Profile
  • Cryptographic services (incl. AES-256, SHA-2, ECC NIST P-256, TRNG and key generation/derivation)
  • Secure key store with key usage policies (protection of platform integrity, manufacturing and applications keys)  
  • Device Unique Identity based on Physically Unclonable Function (PUF)
  • Device Attestation with support of Device Identifier Composition Engine (DICE)
  • Secure connection and TLS support
  • Key management over-the-air with pre-integration of NXP EdgeLock 2GO service platform
     
• EdgeLock^® Accelerator (Public Key Cryptography)
• Immutable ROM  
• Dual Secure Boot Mode (asymmetric mode and Fast, Post-Quantum Secure symmetric mode)
• Secure firmware update support
• Device Life cycle management including secure authenticated debug
• High-performance on-the-fly memory encryption with additional authentication for external Flash
• Protected Flash Region (PFR)
• Security Monitoring:
  • 2x Code Watchdog
  • Intrusion & Tamper Response Controller (ITRC)
  • 8 Active and Passive Tamper Pin Detect
  • Voltage, temperature, light and clock Tamper Detect
  • Voltage glitch Detect
     
• Secure manufacturing and IP theft protection in untrusted factory
• Arm TrustZone^® for Cortex^®-M

Packaging, temperature, and qual

• VFBGA184, 9x9mm and HLQFP100, 14x14mm
• Ta = -40^◦C to 105 ^◦C
• Industrial qualification