New Product Introduction

Renesas RC38312

Three-Channel ultra-low phase noise synchronizer and Jitter Attenuator with 12 outputs

Renesas RC38312 Block Diagram image

FemtoClock 3 family with industry leading phase noise and jitter is now expanding to address wireless infrastructure, including 5G and 5G-A, with high level of integration that supports up to 3 synchronization domains and 4 frequency domains with low power dissipation. FemtoClock 3 for wireless supports multiple operating modes, including synchronization, jitter attenuation, and RF clock generation.

 

Key features

  • Ultra-low in-band and mid-band phase noise and spurious performance 245.76MHz: -112dBc/Hz at 100Hz offset, -150dBc/Hz at 800kHz offset, -90dBc @ 100Hz-100MHz span
  • Up to 12 multi-mode output with programmable output swing with -165dBc/Hz noise floor
  • Up to 4 independent frequency domains with 3 or 1 synchronization domains and support for JESD204B/C for converter deterministic latency; 4 inputs (supports fail-safe) and 12 outputs
  • Enables SyncE+PTP synchronization and jitter attenuation for RF domain in single device
  • Low power dissipation with < 1.5W in full config
  • Compliant with ITU-T G.8273.2 T-BC for IEEE1588/SyncE, G.8262 for SyncE/OTN (EEC/OEC) & ITU-T G.8262.1 for enhanced SyncE/OTN (eEEC/eOEC)

 

Applications

  • Wireless infrastructure
  • Wireline infrastructure
  • Data center
  • Timing

 

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