Infineon OptiMOS™ power MOSFETs 25 V - 150 V
OptiMOS™ power MOSFETs 25 V - 150 V in PQFN 5x6 Source-Down Standard-Gate and Center-Gate DSC
The Source-Down package concept enables a large potential for system-level improvements, utilizing the lowest RDS(on) per footprint area and outstanding the thermal performance to reduce BOM-costs and increase the power density. In combination with a reinforced drain clip on the top side of the chip, package parasitics are significantly reduced and thermal management requires less active cooling, thus further optimizing system efficiency. Furthermore, the dual-side cooling package allows to dissipate up to six times more power compared to the overmolded package. The advanced Center-Gate footprint is optimized for parallelization.
Key features
- Cutting edge silicon technology OptiMOS™ with outstanding FOMs
- Source-Down package with improved thermal performance and ultra-low parasitics
- Source-Down package with maximized chip/package ratio
- Source-Down package in Center-Gate and Standard-Gate footprint
- Dual-side cooling variant
Applications
- Telecom and server
- Drones and robotics
- Power tools and Battery Management Systems (BMS)
- Solar
- Class-D audio applications
- LEVs and low voltage drives
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