STMicroelectronics M95P32-I

The M95P32-I is manufactured with ST's advanced proprietary NVM technology. It offers byte flexibility, page alterability, high page cycling performance, and ultra-low power consumption, equivalent to that of EEPROM technology.

The M95P32-I is a 32-Mbit SPI page EEPROM device organized as 8192 programmable pages of 512 bytes each, accessed through an SPI bus with high-performance dual- and quad-SPI outputs.

The device offers two additional (identification) pages of 512 bytes: additional status, configuration, and volatile registers set the desired device configuration, while the safety register gives device status information.

Key features

• 32Mbit (4Mbytes) SPI Page EEPROM
• Write byte flexibility
• Write page 512 bytes
• Extended range: -40 °C to +105 °C

Additional features

SPI interface

• Supports serial peripheral interface (SPI) and dual/quad outputs
• Wide voltage range:
  • V_CC from 1.6 to 3.6 V
     
• Temperature range:
  • Industrial range: -40 °C to +85 °C
  • Extended range: -40 °C to +105 °C
     
• Fast read:
  • 50 MHz read single output
  • 80 MHz fast read single/dual/quad output with one dummy byte
     

Memory

• 32 Mbits of page EEPROM
  • 64-Kbyte blocks, 4-Kbyte sectors
  • Page size: 512 bytes
  • Two identification pages
     
• Write endurance:
  • 500 kcycles on full temperature range
     
• Data retention:
  • 100 years
  • 10 years after 500 kcycles
     

Ultra-low power consumption

• 0.6 μA (typ) in deep power-down mode
• 16 μA (typ) in Standby mode
• 800 μA (typ) for read single at 10 MHz
• 1.5 mA (typ) for page write
• Current peak control < 3 mA
   

High write erase performance

• Fast Write/Prog/Erase times:
  • 2 ms (typ) for byte and page write (includes auto erase and program) for 512 bytes
  • 1.2 ms (typ) for page program (512 bytes)
  • 1.1 ms (typ) for page erase
  • 1.3 ms (typ) for sector erase
  • 4 ms (typ) for block erase
  • 15 ms (typ) for chip erase
     
• Page program with buffer load
   

Advanced features

• ECC for high memory reliability (DEC,TED)
• Schmitt trigger inputs for noise filtering
• Output buffer programmable strength
• Operating status flags for ISO26262
• Software reset
• Write protection by block, with top/bottom option ...

Applications

• Wearable
• Medical and healthcare
• IoT for smart home and city
• IoT for smart industry

 

 

Available tools

 

X-NUCLEO-PGEEZ1:

Standard SPI page EEPROM memory expansion board based on M95P32 series for STM32 Nucleo

This expansion board allows developers to evaluate the new memory page EEPROM through a single/dual/quad SPI interface.

It acts as an external storage device that can be used to store data, such as manufacturing traceability, calibration, user settings, error flags, data logs, and monitoring data to build more flexible and accurate applications.

DATASHEET