Renesas 8V19N880
JESD204B/C clock jitter attenuator
The 8V19N880 is a fully integrated FemtoClock® RF Sampling Clock Generator and Jitter Attenuator designed as a high-performance clock solution for conditioning and frequency/phase management of wireless base station radio equipment boards. The device is optimized to deliver excellent phase noise performance as required in 4G, 5G, and including mmWave radio implementations. The device supports JESD204B (subclass 0 and 1) and JESD204C.
Key features
- Support for JESD204B/C
- Low phase noise (74 fs, integrated over 12 kHz - 20 MHz)
- Redundant input clock architecture
- Clock output frequencies: up to 6 GHz
Additional features
- High-performance clock RF sampling clock generator and clock jitter attenuator with support for JESD204B/C
- Low phase noise: -144.7 dBc/Hz (800 kHz offset; 491.52 MHz)
- Integrated phase noise of 74 fs RMS (12 kHz to 20 MHz, 491.52 MHz)
- Dual-PLL architecture with internal and optional external VCO
- Eight output channels with a total of 18 outputs
- Configurable integer clock frequency dividers
- Clock output frequencies: up to 3932.16 MHz (Internal VCO) and 6 GHz (optional external VCO)
- Differential, low noise I/O
- Deterministic phase delay and integrated phase delay circuits
- Redundant input clock architecture with four inputs and monitors, holdover, and input switching
- SPI 3/4 wire configuration interface
- Supply voltage: 1.8 V and 3.3 V
- Package: 100 CABGA (11 x 11 mm²)
- Temperature range: -40 °C to +95 °C (board)
Applications
- Wireless infrastructure applications: 4G, 5G, and mmWave
- Data acquisition: jitter-sensitive ADC and DAC circuits
- Radar, imaging, instrumentation, and medical
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