New Product Introduction

Renesas RA4M2

32-bit ARM Cortex-M33 100MHz MCU with trust zone and secure element functionality

Renesas RA2E1 product image

The Renesas RA4M2 group uses the high-performance Arm® Cortex®-M33 core with TrustZone®. In concert with the Secure Crypto Engine it offers Secure Element functionality. It offers rich connectivity with USB 2.0 FS, SDHI, QSPI, and advanced analog.

The RA4M2 is supported by an open and flexible ecosystem concept—the Flexible Software Package (FSP), built on FreeRTOS—and is expandable to use other RTOSes and middleware. The RA4M2 is suitable for IoT applications requiring future proof security, large embedded RAM, and low active power consumption down to 81uA/MHz running CoreMark® from Flash.

 

Key features

  • RA4M2 Arm Cortex-M33 based MCUs Boost Performance up to 100 MHz for IoT Edge Devices
  • The latest ARMv8-M core architecture with Trust Zone + Secure Element Functionality
  • Lowest active power consumption down to 81uA/MHz
  • CTSU Capacitive Touch

 

Additional features

  • Armv8-M Arm® Cortex®-M33 Core 100 MHz
    • Protected Memory System Architecture (PMSAv8), Secure MPU (MPU_S): 8 regions, Non-secure MPU (MPU_NS): 8 regions
  • Memory
    • 512kB code FLASH, 8KB data FLASH (100,000 program/erase cycles), 128KB SRAM
  • DMA 8 channels + DTC 5 channels
  • CTSU Capacitive Touch
  • Multiple Clock Sources
    • Main clock oscillator (MOSC) (8 to 24 MHz), Sub-clock oscillator (SOSC) (32.768 kHz), High-speed on-chip oscillator (HOCO) (16/18/20 MHz), Middle-speed on-chip oscillator (MOCO) (8 MHz)
    • Low-speed on-chip oscillator (LOCO) (32.768 kHz), IWDT-dedicated on-chip oscillator (15 kHz), Clock trim function for HOCO/MOCO/LOCO, PLL/PLL2, Clock out support
  • Independent watchdog timer
  • Analog
    • 12-bit A/D Converter (ADC12), 12-bit D/A Converter (DAC12) × 2, Temperature Sensor (TSN)
  • Connectivity
    • Serial Communications Interface (SCI) × 6, Asynchronous interfaces, 8-bit clock synchronous interface, Smart card interface, Simple IIC, Simple SPI, Manchester coding (SCI3, SCI4)
    • I2C bus interface (IIC) × 2, Serial Peripheral Interface (SPI) × 1, Quad Serial Peripheral Interface (QSPI), USB 2.0 Full-Speed Module (USBFS), Control Area Network module (CAN) × 2
    • SD/MMC Host Interface (SDHI), Serial Sound Interface Enhanced (SSIE)
  • Security and Encryption
    • Secure Crypto Engine 9, Symmetric algorithms: AES, Asymmetric algorithms: RSA, ECC, and DSA, Hash-value generation: SHA224, SHA256, GHASH, 128-bit unique ID
    • Trust Zone, Up to three or six regions for the code flash, depending on the bank mode, Up to two regions for the data flash, Up to three regions for the SRAM

 

Applications

  • Secure communication gateway
  • Human Machine Interface with robust Capacitive Touch
  • Central control unit of power conversion applications
  • IoT communication platform & secure datalogger
  • Cloud gateway
  • Metering control boards / concentrators
  • Cash registers
  • Robots
  • PLC
  • Access Systems

 

Available tools

  • IDE
    • SecureRenesas e2Studio
    • Keil MDK
    • IAR Embedded Workbench
  • Compiler
    • – GNU
    • Keil
    • IAR Systems
  • Software Support
    • FSP (Flexible Software Package)
    • Smart Configurator
    • Driver selection
    • Intelligent Pin Mapping
    • Trust Zone Configurator
  • On Chip Debug
    • Renesas E2 / E2 Lite
    • Segger J-Link
  • Evaluation Boards
    • Set of Evaluation (EKxxx) boards

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