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KIOXIA new generation of serial NAND - SLC with Quad-SPI interface

KIOXIA introduces a new family of Serial NAND - SLC with Quad-SPI Interface

To utilize Serial Peripheral Interface (SPI) for connecting SLC NAND to the SoC is getting popular. The easier interface adaptation and smallest package are key advantages for memory design.

KIOXIA's new line-up of 24 nm Serial NAND supporting SPI Interface up to quad-speed is now available. The new generation is not only offering a higher clock rate and four times higher program speed but also adds the 8 Gbit densities to the family. It is available in a small WSON package (6 x 8 mm) providing enhanced features like optional ECC support, security features, and industrial temperature range.

Features

Quad - SPI support
Line up from 1 Gbit to 8 Gbit
Space-saving WSON package with 6 x 8 mm
Optional 8-bit ECC engine embedded

Additional features

SLC (Single Level Cell) NAND
Device Density: 1 Gbit, 2 Gbit, 4 Gbit, 8 Gbit (NEW)
Page Size:
- 2112 byte (1 Gbit, 2 Gbit Internal ECC Enable)
- 4224 byte (4 Gbit, 8 Gbit Internal ECC Enabled)
Block Size:
- (128 K + 4 K)byte (1 Gbit, 2 Gbit Internal ECC Enable)
- (256 K + 8 K)byte (4 Gbit, 8 Gbit Internal ECC Enable)
Power Supply:2.7 - 3.6 V, 1.7 - 1.95 V
Operation Temperature: -40 ⁰C to 85 ⁰C
Package: WSON-8
I/F Specification
- I/F: SPI (x 1, x 2, x 4) Mode 0, Mode 3
- Clock Frequency: up to 133 MHz (for New Generation)
- Program mode: x1 / x4 mode (for New Generation)
Internal ECC
- 8-bit ECC for every 528 bytes is implemented
- Users can switch enable/disable of internal ECC.
Function
- Page Read, Page Program, Block Erase
- Write Enable / Disable
- Block Lock
- Set Feature / Get Feature
- Parameter Page Read
- ID Read
- Block Protection (OTP)
- ECC Bit Flip Count Report